Buried SiGe as a performance booster in n-channel FDSOI MOSFETs
Solid State Electronics
December 2019
https://www.sciencedirect.com/science/article/pii/S0038110119302400?dgcid=author
Bulk n-channel MOSFETs with buried stressor at the 28 nm process node
Solid State Electronics,
April 2020
https://doi.org/10.1016/j.sse.2020.107769;
Effective-mass theory of metal-semiconductor contact resistivity,
Applied Physics Letters,
August 2013
https://aip.scitation.org/doi/10.1063/1.4818265;
Method and process flow for CMOS compatible photonics integration,
Phys. Status Solidi C,
May 2011
https://doi.org/10.1002/pssc.201084133
Fermi-level depinning for low-barrier Schottky source/drain transistors,
Applied Physics Letters,
January 2006
https://doi.org/10.1063/1.2159096
A new route to zero-barrier metal source/drain MOSFETs,
IEEE Transactions on Nanotechnology,
March 2004
https://doi.org/10.1109/TNANO.2003.820774